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Rev. 1.60 176 August 20, 2019 Rev. 1.60 177 August 20, 2019
BS66F340/BS66F350/BS66F360/BS66F370
Touch A/D Flash MCU with LED Driver
BS66F340/BS66F350/BS66F360/BS66F370
Touch A/D Flash MCU with LED Driver
Bit 4 ADDEN: Address detect function enable control
0: Address detection function is disabled
1: Address detection function is enabled
The bit named ADDEN is the address detection function enable control bit. When this
bit is equal to 1, the address detection function is enabled. When it occurs, if the 8
th
bit, which corresponds to RX7 if BNO=0, or the 9
th
bit, which corresponds to RX8 if
BNO=1, has a value of "1", then the received word will be identied as an address,
rather than data. If the corresponding interrupt is enabled, an interrupt request will be
generated each time the received word has the address bit set, which is the 8
th
or 9
th
bit depending on the value of the BNO bit. If the address bit known as the 8
th
or 9
th
bit of the received word is "0" with the address detection function being enabled, an
interrupt will not be generated and the received data will be discarded.
Bit 3 WAKE: RX pin falling edge wake-up function enable control
0: RX pin wake-up function is disabled
1: RX pin wake-up function is enabled
The bit enables or disables the receiver wake-up function. If this bit is equal to 1 and
the device is in IDLE0 or SLEEP mode, a falling edge on the RX pin will wake up the
device. If this bit is equal to 0 and the device is in IDLE or SLEEP mode, any edge
transitions on the RX pin will not wake up the device.
Bit 2 RIE: Receiver interrupt enable control
0: Receiver related interrupt is disabled
1: Receiver related interrupt is enabled
The bit enables or disables the receiver interrupt. If this bit is equal to 1 and when the
receiver overrun flag OERR or received data available flag RXIF is set, the UART
interrupt request ag will be set. If this bit is equal to 0, the UART interrupt request
ag will not be inuenced by the condition of the OERR or RXIF ags.
Bit 1 TIIE: Transmitter Idle interrupt enable control
0: Transmitter idle interrupt is disabled
1: Transmitter idle interrupt is enabled
The bit enables or disables the transmitter idle interrupt. If this bit is equal to 1 and
when the transmitter idle ag TIDLE is set, due to a transmitter idle condition, the
UART interrupt request ag will be set. If this bit is equal to 0, the UART interrupt
request ag will not be inuenced by the condition of the TIDLE ag.
Bit 0 TEIE: Transmitter Empty interrupt enable control
0: Transmitter empty interrupt is disabled
1: Transmitter empty interrupt is enabled
The bit enables or disables the transmitter empty interrupt. If this bit is equal to 1 and
when the transmitter empty ag TXIF is set, due to a transmitter empty condition, the
UART interrupt request ag will be set. If this bit is equal to 0, the UART interrupt
request ag will not be inuenced by the condition of the TXIF ag.

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