Rev. 1.60 224 August 20, 2019 Rev. 1.60 225 August 20, 2019
BS66F340/BS66F350/BS66F360/BS66F370
Touch A/D Flash MCU with LED Driver
BS66F340/BS66F350/BS66F360/BS66F370
Touch A/D Flash MCU with LED Driver
NOP
No operation
Description No operation is performed. Execution continues with the next instruction.
Operation No operation
Affected ag(s) None
OR A,[m]
Logical OR Data Memory to ACC
Description Data in the Accumulator and the specied Data Memory perform a bitwise
logical OR operation. The result is stored in the Accumulator.
Operation ACC ← ACC ″OR″ [m]
Affected ag(s) Z
OR A,x
Logical OR immediate data to ACC
Description Data in the Accumulator and the specied immediate data perform a bitwise logical OR
operation. The result is stored in the Accumulator.
Operation ACC ← ACC ″OR″ x
Affected ag(s) Z
ORM A,[m]
Logical OR ACC to Data Memory
Description Data in the specied Data Memory and the Accumulator perform a bitwise logical OR
operation. The result is stored in the Data Memory.
Operation [m] ← ACC ″OR″ [m]
Affected ag(s) Z
RET
Return from subroutine
Description The Program Counter is restored from the stack. Program execution continues at the restored
address.
Operation Program Counter ← Stack
Affected ag(s) None
RET A,x
Return from subroutine and load immediate data to ACC
Description The Program Counter is restored from the stack and the Accumulator loaded with the specied
immediate data. Program execution continues at the restored address.
Operation Program Counter ← Stack
ACC ← x
Affected ag(s) None
RETI
Return from interrupt
Description The Program Counter is restored from the stack and the interrupts are re-enabled by setting the
EMI bit. EMI is the master interrupt global enable bit. If an interrupt was pending when the
RETI instruction is executed, the pending Interrupt routine will be processed before returning
to the main program.
Operation Program Counter ← Stack
EMI ← 1
Affected ag(s) None
RL [m]
Rotate Data Memory left
Description The contents of the specied Data Memory are rotated left by 1 bit with bit 7 rotated into bit 0.
Operation [m].(i+1) ← [m].i; (i=0~6)
[m].0 ← [m].7
Affected ag(s) None