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Rev. 1.60 74 August 20, 2019 Rev. 1.60 75 August 20, 2019
BS66F340/BS66F350/BS66F360/BS66F370
Touch A/D Flash MCU with LED Driver
BS66F340/BS66F350/BS66F360/BS66F370
Touch A/D Flash MCU with LED Driver
Bit 1 HIRCF: HIRC oscillator stable ag
0: HIRC unstable
1: HIRC stable
This bit is used to indicate whether the HIRC oscillator is stable or not. When the
HIRCEN bit is set to 1 to enable the HIRC oscillator or the HIRC frequency selection
is changed by application program, the HIRCF bit will rst be cleared to 0 and then
set to 1 after the HIRC oscillator is stable.
Bit 0 HIRCEN: HIRC oscillator enable control
0: Disable
1: Enable
HXTC Register
Bit 7 6 5 4 3 2 1 0
Name HXTM HXTF HXTEN
R/W R/W R R/W
POR 0 0 0
Bit 7~3 Unimplemented, read as "0"
Bit 2 HXTM: HXT mode selection
0: HXT frequency
10 MHz
1: HXT frequency >10 MHz
This bit is used to select the HXT oscillator operating mode. Note that this bit must
be properly congured before the HXT is enabled. When the HXTEN bit is set to 1 to
enable the HXT oscillator, it is invalid to change the value of this bit.
Bit 1 HXTF: HXT oscillator stable ag
0: HXT unstable
1: HXT stable
This bit is used to indicate whether the HXT oscillator is stable or not. When the
HXTEN bit is set to 1 to enable the HXT oscillator, the HXTF bit will rst be cleared
to 0 and then set to 1 after the HXT oscillator is stable.
Bit 0 HXTEN: HXT oscillator enable control
0: Disable
1: Enable
LXTC Register
Bit 7 6 5 4 3 2 1 0
Name LXTSP LXTF LXTEN
R/W RW R R/W
POR 0 0 0
Bit 7~3 Unimplemented, read as "0"
Bit 2 LXTSP: LXT oscillator speed-up control
0: Disable – Low power
1: Enable – Speed up
This bit is used to control whether the LXT oscillator is operating in the low power
or quick start mode. When the LXTSP bit is set to 1, the LXT oscillator will oscillate
quickly but consume more power. If the LXTSP bit is cleared to 0, the LXT oscillator
will consume less power but take longer time to stablise. It is important to note that
this bit can not be changed after the LXT oscillator is selected as the system clock
source using the CKS2~CKS0 and FSS bits in the SCC register.

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