3-168
Performance Tests
PDH Binary Interfaces (Option UH3, [US7])
PDH Binary Interfaces (Option UH3, [US7])
Specifications
Clock O/P Data O/P
Rate 700 kb/s to 50 Mb/s (TTL) 700 kb/s to 50 Mb/s (TTL)
700 kb/s to 170 Mb/s (ECL) 700 kb/s to 170 Mb/s (ECL)
Format Nominal squarewave, 60/40 to
40/60 duty cycle
NRZ
Source
Impedance
Nominal TTL into 75Ω to ground
Nominal ECL into 75Ω to -2V
Nominal TTL into 75Ω to ground
Nominal ECL into 75Ω to -2V
Clock I/P Data I/P
Rate 700 kb/s to 50 Mb/s (TTL) 700 kb/s to 50 Mb/s (TTL)
700 kb/s to 170 Mb/s (ECL) 700 kb/s to 170 Mb/s (ECL)
Format Nominal squarewave, 60/40 to
40/60 duty cycle
NRZ
Logic
Threshold
1.5V (TTL), -1.3V (ECL), ground,
signal mean level
1.5V (TTL), -1.3V (ECL), ground,
signal mean level
Termination Nominal TTL into 75Ω to ground Nominal TTL into 75Ω to ground
Nominal ECL into 75Ω to -2V Nominal ECL into 75Ω to -2V