Infineon TRAVEO T2G family CYT4D Series - Page 43

Application Note 43 of 80 002-26071 Rev. *B
2021-09-07
Clock configuration setup in TRAVEO™ T2G family CYT4D series MCUs
Configuration of the FLL and PLL
Code Listing 31 Cy_SysClk_PllCalucDividers() function
return (CY_SYSCLK_SUCCESS);
}
}
Code Listing 32 Cy_SysClk_Pll400MEnable() function
cy_en_sysclk_status_t Cy_SysClk_Pll400MEnable(uint32_t clkPath, uint32_t timeoutus)
{
uint32_t pllNo;
cy_en_sysclk_status_t status = Cy_SysClk_GetPll400MNo(clkPath, &pllNo);
if(status != CY_SYSCLK_SUCCESS)
{
return(status);
}
/* first set the PLL enable bit */
SRSS->CLK_PLL400M[pllNo].unCONFIG.stcField.u1ENABLE = 1ul;
/* now do the timeout wait for PLL_STATUS, bit LOCKED */
for (; (SRSS->CLK_PLL400M[pllNo].unSTATUS.stcField.u1LOCKED == 0ul) &&
(timeoutus != 0ul);
timeoutus--)
{
Cy_SysLib_DelayUs(1u);
}
status = ((timeoutus == 0ul) ? CY_SYSCLK_TIMEOUT : CY_SYSCLK_SUCCESS);
return (status);
}
Code Listing 33 General configuration of PLL 200 #0 settings
:
#define PLL200_0_TARGET_FREQ (160000000ul)
#define PLL200_1_TARGET_FREQ (80000000ul)
:
/** Wait time definition **/
#define WAIT_FOR_STABILIZATION (10000ul)
:
#define PLL_400M_0_PATH_NO (1ul)
#define PLL_400M_1_PATH_NO (2ul)
#define PLL_200M_0_PATH_NO (3ul)
#define PLL_200M_1_PATH_NO (4ul)
#define BYPASSED_PATH_NO (5ul)
:
/*** Parameters for Clock Configuration ***/
cy_stc_pll_config_t g_pll200_0_Config =
{
.inputFreq = PATH_SOURCE_CLOCK_FREQ, // ECO: 16MHz
.outputFreq = PLL200_0_TARGET_FREQ, // target PLL output
.lfMode = false, // VCO frequency is [200MHz, 400MHz]
.outputMode = CY_SYSCLK_FLLPLL_OUTPUT_AUTO,
};
:
int main(void)
{
:
/* Enable interrupt */
__enable_irq();
/* Set Clock Configuring registers */
AllClockConfiguration();
:
/* Please check clock output using oscilloscope after CPU reached here. */
for(;;);
}
(5) Enable PLL400
(6) Wait until the PLL400 is locked.
Wait for 1 us.
(7) Check the timeout.
Define the PLL number.
PLL target frequency
Define the TIMEOUT variable
PLL200 #0 configuration
PLL200 #0 setting. See Code Listing 34.