Intel Agilex 7 FPGA I-Series User Manual

Intel Agilex 7/System Intel MAX 10 also manages QSFPDD800, 4x QSFPDD, 1DPC
DIMM, 3x QSFP, SFP, OSFP, 2x FMC, MCIO I2C buses System Intel MAX 10 supports as
a I2C Master for Current (IVSNS_I2C_SDA /SCL) and Temperature sensors
(T_SNS_SCL/SDA).
SGPI Interface exists between System Intel MAX 10 and Intel Agilex 7
(FPGA_SGPIO_SYNC/FPGA_SGPO/FPGA_SGPIO_CLK/FPGA_SGPI).
System Intel MAX 10 as SPI Master to communicate with Intel Agilex 7
(MAX10_SPI_SCLK/CSN/MOSI/MISO).
Intel Agilex 7 as SPI Master to communicate with System Intel MAX 10
(FPGA_SPI_SCLK/CSN/MOSI/MISO).
Table 23. I
2
C Debug Headers
Schematic Signal Name Description
PMB_SCL/SDA
VRs I2C header J41
CLK_I2C_SDA/SCL_3V3
System Intel MAX 10 Clock I2C bus header J140 (ES board) or J42 (production board)
IVSNS_I2C_SDA /SCL
Current sensor J149
T_SNS_SCL/SDA
Temperature sensor I2C J79
Table 24. SPI Headers
Schematic Signal Name Description
SI5518_I2C_SCL_SCLK/SI5518_GPIO3_SDO/
SI5518_I2C_SDA_SDIO/SI5518_A0_CSB
SI5518 SPI Header J31
A. Development Kit Components
776646 | 2023.05.31
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Intel Agilex
®
7 FPGA I-Series Transceiver (6 × F-Tile) Development Kit User
Guide
51

Intel Agilex 7 FPGA I-Series Specifications

General

Brand	Intel
Model	Agilex 7 FPGA I-Series
Category	Microcontrollers
Language	English