Intel Agilex 7 FPGA I-Series - Clocks

Figure 30. Power Sequence
!
On board hot-plug circuit shuts down all power rails when total power over 360 W (30
A) @ each power port.
UB2/PWR MAX 10 shuts down significant power rails when one or more power good
indicators below low due to a power fault.
UB2/PWR MAX10 also shuts down significant power rails when temperature cross the
acceptable range.
A.4. Clocks
Table 8. Default Clock Frequency
Schematic Signal Name Default Frequency (Hz)
125M_F_OSC_CLK1 125M
CLK_TOD_10M_DN/DP 10M
CLK_1PPS_1V2_FM91 1
continued...
A. Development Kit Components
776646 | 2023.05.31
Intel Agilex
®
7 FPGA I-Series Transceiver (6 × F-Tile) Development Kit User
Guide
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