Intel Agilex 7 FPGA I-Series - Page 39

Schematic Signal Name Default Frequency (Hz)
DDR_1_166.66M_REFCLK_DN/DP 166.66M
DDR_2_166.66M_REFCLK_DN/DP 166.66M
DDR_3_166.66M_REFCLK_DN/DP 166.66M
DDR_4_166.66M_REFCLK_DN/P 166.66M
CLK_100M_GPIO_2C_DN/DP 100M
1PPS_SMA_OUT_1V2 1
CLK_100M_GPIO_4_DN/DP 100M
CLK_PCIE_EP_MCIO1_DP/DN 100M
CLK_PCIE_RP_MCIO1_DP/DN 100M
PCIE_100M_REF_AP/AN 100M
SYS_M10_50M 50M
PWR_M10_50M 50M
SMA_1PPS_OUT 1
SMA_10MHZ_OUT 10M
REFCLK_FGT_12A_8_DP/DP Not assigned
REFCLK_FGT_12A_9_DP/DP Not assigned
FMCA_RECRD_CLK_DP/DN Not assigned
REFCLK_FGT_13C_8_DP/DN Not assigned
REFCLK_FGT_13C_9_DP/DN Not assigned
FMCB_RECRD_CLK_DP/DN Not assigned
OCXO_19.44MHZ 19.44M
SI5518_REF_IN_R 54M
SI5518_XTAL_XA 54M
FMCA_ETH_REFCLK_156.25M_DP/DN 156.25M
FMCB_ETH_REFCLK_156.25M_DP/DN 156.25M
SI5518_OUT2_1PPS_PLL_FB 1
FMCA_CPRI_REFCLK_153.6M_DP/DN 153.6M
FMCB_CPRI_REFCLK_153.6M_DP/DN 153.6M
FMCA_CPRI_REFCLK_184.32M_DP/DN 184.32M
FMCB_CPRI_REFCLK_184.32M_DP/DN 184.32M
CLK_TOD_10M_DP/DN 156.25M
CLK_1PPS_FM91 1
CLK_1PPS_OUT_SMA 1
CLK_10M_OUT_SMA 10M
CLK_SI5518_FREQ_OUT12_156.25M_DP/DN 156.25M
CLK_SI5518_FREQ_OUT14_156.25M_DP/DN 156.25M
continued...
A. Development Kit Components
776646 | 2023.05.31
Send Feedback
Intel Agilex
®
7 FPGA I-Series Transceiver (6 × F-Tile) Development Kit User
Guide
39