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Intel Agilex 7 FPGA I-Series User Manual

Intel Agilex 7 FPGA I-Series
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Figure 25. Si5518
Import
You can generate the register list from the Clockbuilder Pro tool and import it into
Si5518 to update the settings of RAM. Register changes are volatile after power
cycling.
Default
Sets the frequency for the oscillator associated with the active tab back to its default
value. This can also be accomplished by power cycling the board.
Soft Reset
Initiate a global soft reset. The global soft reset will not download the firmware and
frequency plan from NVM. Instead, it will restart the firmware and frequency plan
currently running on the device. The device will act like it has been rebooted.
4.4. Monitor On-Board Power Regulator through Power Monitor GUI
The Power Monitor GUI reports most power rails’ voltage, current, and power
information on the board. It also collects temperature from FPGA die, power modules,
and diodes assembled on PCB.
The Power Monitor GUI communicates with System Intel MAX 10 through a 10-pin
JTAG header J11 or USB port J10. System Intel MAX 10 monitors and controls power
regulator, temperature/voltage/current sensing chips through a 2-wire I
2
C bus.
The instructions to run Power Monitor GUI are stated in the Run BTS GUI on page 13.
It can also be started with the BTS GUI icon “Power”.
Note: You cannot run the stand-alone Power Monitor GUI when the BTS or the Clock
Controller GUI is running at the same time.
4. Board Test System
776646 | 2023.05.31
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Intel Agilex
®
7 FPGA I-Series Transceiver (6 × F-Tile) Development Kit User
Guide
27

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Intel Agilex 7 FPGA I-Series Specifications

General IconGeneral
BrandIntel
ModelAgilex 7 FPGA I-Series
CategoryMicrocontrollers
LanguageEnglish

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