SECTION 7
Maintenance
2
3
!I
;
i
10
11
12
13
14
15
16
17
18
19
-
Power on self-tes
USCO, pin 3
u509, pins 34,35
u509, pin 3
u509, pin 37
u501, pin 18
u501. Din 14
u501; iin 9
u502, pin 9
u501, pin 3
u501, pin 7
u502, pin 3
LJ504, pin 4
u504, pin 5
U504, pin 6
U503. pin 6
u505, pins 2,3
u515, pin 8
U515, pins 4,5,6
Table 7-6.
Digital Circuitry Checks
Required Condition Remarks
No hihms reported
+5v, L%5%
ZMHz square wave
25psec negative-going pulse every lmsec
Stays low WCOxnsec) on power up, then goes high
lh4Hz pulse trains
Variable width (incmnents of lpsec) pulses.
Brief pukes
56-pulse burst at lmsec intervals
Pulse burst every lmsec
Positive pulse every lmsec
Positive pulse every lmsec
Pulse train with ZERO CHECK pressed
Pulse train with LOCAL pressed
Pulse train with FlLTER pressed
Negative-going pulses every lmsec
Alternates between high and low every other lamb
click
Goes low when bus command is sent
Refer to Figure E-2 for required conditions
RAM ERROR check u511
ROM ERROR: check U508
NO DFLTSz check U510
+5V digital supply, referenced to
digital common W500, pin 2)
B&EandQclo&s -
h4l’Um line
MMJRESETline
ANALOG CLOCK
ANALOG DATA
ANALOG STROBE
DISPLAY CLOCK
DISPLAY DATA
DISPLAY LEFT signal
DISPLAY RIGHT signal
KEY SO data
KEY Sl data
KEY 52 data
SHIFT DONE signal
Knob data
IEEE-488 ATN line
Handshake sequence for NDAC,
NRFD, and DAV
7-15
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