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ECP5 and ECP5-5G High-Speed I/O Interface
There is an additional tab called Advanced Settings for the ECP5 and ECP5-5G device that can be used to adjust
the default DQS Read and Write Delay settings.
Figure 49. DDR_MEM Advanced Settings Tab
Table 13 shows the available values in this tab.
Number of Chip Selects DDR2: 1, 2, 4
DDR3: 1, 2, 4
DDR3L: 1, 2, 4
LPDDR2: 1
LPDDR3: 1
DDR2: 1
DDR3: 1
DDR3L: 1
LPDDR2: 1
LPDDR3: 1
Number of Clock Enables = Number of Chip Selects = Number of Chip Selects
Number of ODT DDR2, DDR3, DDR3L = Number of Chip Selects
LPDDR2: Blank
LPDDR3=Number of Chip Selects
DDR2, DDR3, DDR3L = Number of
Chip Selects
LPDDR2: Blank
LPDDR3= Number of chip Selects
GUI Option Range Default Value
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