The PIC32MZxxEFxx silicon revision B2 currently supports only up to 184 MHz operation with 2 wait
states. Operating frequencies in excess of 184 MHz requires 3 WS. With program memory cache enabled;
however
, this will affect MCU bandwidth <1.5%.
7.5.2 PIC32MK/PIC32MZxxDAxx/PIC32C
Problem 7: Using an external clock with the MCU in external clock (EC) mode, the clock is an input to the MCU, but
nothing is happening.
Problem 8: Using a crystal with automatic gain control enabled, POSCAGC = 1, and getting a clock fail detect.
These device families and some PIC32C variants of MCUs (consult data sheet for information) have automatic gain
control features defined by configuration words ‘enabled by default’ if not explicitly defined by the user which is often
overlooked. When the automatic gain control is enabled, the manual course and fine crystal gain settings are ignored.
When the POSCAGC bit is enabled and POSC HS mode is selected, in the appropriate configuration word, the
Primary Oscillator will automatically do a linear step search starting from the lowest crystal oscillator circuit gain to the
highest, to find the lowest power/gain setting to guarantee oscillation with the user
’s crystal. The delay between each
AGC gain search step is defined by POSCAGCDLY.
If External Clock (EC) mode and AGC are selected, it will result in no internal clock and a dead CPU.
When AGC, POSCAGC = 1, and clock fail monitoring, the FCKSM is enabled in the configuration words.
If POSCAGCDL
Y is set to long, a “Clock Fail Detect”, OSCCON.CF and RNMICON.CF on some families,
can occur because the clock fail timeout expectancy expired before the AGC was able to reach a stable
gain step to allow stable crystal operation. Decrease the POSCAGCDLY settings.
If using an AGC and experiencing excessive crystal start-up delays, change the POSCAGCDLY settings.
7.5.3 SAMxx
Problem 9: Auto Gain Control is being used, but intermittent start-up issues are occurring on some boards and/or
over temperature.
The SAM product families that employ the equivalent to a crystal Automatic Gain Control, sometimes referred to as
Automatic Loop Control Enable (ENALC), or Automatic Amplitude Gain Control (AMPGC) depending on the product
family
, work quite differently than the AGC of the PIC32MK / PIC32MZ families. In the SAM product families, the
manual gain settings are controlled by one of the following, depending on the family:
• XOSCCTRL.ENALC: XOSCCTRL.IMULT Oscillator Current Multiplier, XOSCCTRL.IPTAT Oscillator Current
Reference and XOSCCTRL.LOWBUFGAIN are crucial.
• XOSCCTRL.AMPGC: XOSCCTRL.GAIN.
In these instances, once the gain range has been selected by the user, the automatic gain control will only seek the
lowest crystal oscillator power level within the users selected gain range setting.
If users gain settings are too low, the automatic gain control will not help them and can result in random
oscillation failures across device population, particularly at colder temperatures and lower MCU operating
voltages. If any of these symptoms are experienced, increase the gain range using the appropriate
XOSCCTRL.LOWBUFGAIN = 1 or higher XOSCCTRL.GAIN setting for the family in question. In some
instances, better results are attained by disabling the automatic gain control and simply selecting a higher
gain setting. The automatic gain control will be better described as a gain attenuator in that for the selected
user
, the gain setting will attenuate it to achieve the lowest power level to sustain oscillation.
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MCU Start-up Problems
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Manual
DS70005439B-page 19
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