Figure 11-10. USB Host Design Example Diagram
USB 2.0 HOST PROTECTION EXAMPLE
OUT
FLT
GND
3,4,5
EMI2121
PAD
VBUS
D-
D+
GND
USB 2.0
TYPE-A
2
1
7
8
MCU
D-
D+
Transient Suppressor +
↓ EMI / EFT Filter
NOTE:
Ground connection on all TVS, Transient Voltage Suppressors, MUST
be directly connected to ground plane and not through a trace to ground
to minimize inductance. In addition, they should be located as close to the external
USB Connector as possible
3
4
6
1
2
NOTE:
USB D+ and D- differential controlled layout rules apply. PCB layout should maintain
90-ohm controlled impedance. USB signals should not transition PCB layers, (i.e. no
feed through holes.), and no broken ground, (i.e. ground voids), beneath D+ and D-.
Opt(B)
Chassis
(AC) Gnd
if available
(Preferred)
If chassis (AC) Gnd
not available
Opt(A)
10K
VBUS
BLM31KN471SN1L
BLM31KN471SN1L
0.01uf
22uf
480Ω @100Mhz, DC=0.02Ω, 4A
BLM31KN471SN1L
NOTE:
NOTE:
See appropriate MCU power bypassing
circuit configuration illustrations in section 2.2
+5v
TPS2041C
IN
1
2
5
3
4
5v, 500ma
Current Sensing switch
I/O
10k
I/O
10k
SHEILD
3.3v
___
ENB
11.6.1 Key USB Host Design Points
• On the USB connector as shown in the figure above, note that the shield is not tied to the digital signal ground
which is a typical design error
. Connecting the shield to the digital ground ensures that an ESD discharge event
does not infiltrate the digital ground system and disrupt normal application operation, which will result in an MCU
reset or component failure. Attach the shield to the chassis ground. If the chassis ground is not accessible, then
connect through either:
– 1k Ohms @ 100 MHz Ferrite Bead 1A, DCR = 0.15 Ohm for ESD protection only concerns (i.e.
MI0805J102R-10)
– Recommended: A 10k fixed resistor which adds not only ESD protection but a ground loop current
isolation between the remote system shield or case and the local digital ground in case the remote system
did not follow good design practices. The 10k is a low enough impedance for the shield, so that RF and
EMI interference is effectively attenuated to maintain the USB cable shield effectiveness.
• On the USB connector, the digital ground, pin 4, and the ferrite bead to help protect against possible ESD
ground discharge event from the remote system. The normal series resistor is in line with the ferrite on many
other peripheral interfaces to limit potential ground loop currents. It is absent here due to the potentially large
USB downstream power requirements.
• The transient voltage suppressors and 90Ω common mode choke should be located as close to the USB
connector as possible. The common mode choke is only for conducted EMI isolation.
• The TPS2041C current limiting switch, TPS20xxx is available in 500 mA to 2 amp varieties in 0.5amp steps. Its
purpose is to limit downstream VBUS loading to protect the 5V supply on a host system.
Note: There is comprehensive information available on ESD, EMI, or EFT on Microchip web site that can be found
in the document: AN2587 - EMI, EMC, EFT, and ESD Circuit Design Consideration for 32-bit Microcontrollers, or on
any of the 32-bit product web pages under the tab Documentation > Application Notes.
Return to Checklist
Serial Data Corruption Errors
© 2022 Microchip T
echnology Inc.
and its subsidiaries
Manual
DS70005439B-page 46
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