Microsemi SmartFusion2 - Figure 41 Ram_Interafce FSM Component

Appendix: Implementing Workaround to Access Fabric LSRAM after IAP/ISP Program
Operation
DG0584 Demo Guide Revision 5.0 33
c. Click the Dev_Restart_after_IAP_blk tab and drag the Ram_interface component from the
Design Hierarchy to the Dev_Restart_after_IAP_blk SmartDesign canvas. Figure 41 shows the
Ram_interface component.
Figure 41 • Ram_interafce FSM Component
After the completion of the IAP programming, the System Controller asserts POWER_ON_RESET_n to
the FPGA fabric. This triggers the RESETn signal and initiates the state machine in the FSM module.
5. Drag the Two-Port Large SRAM (TPSRAM) available in the Libero Catalog to the
Dev_Restart_after_IAP_blk SmartDesign canvas.
6. Configure the TPSRAM with the following settings:
• Write Port
– Depth: 64
– Width: 8
• Read Port
– Depth: 64
– Width: 8
•Select Check REN check box