722
Appendix 1.3 Operation Processing Time of High Performance Model
QCPU/Process CPU/Redundant CPU
The processing time for the individual instructions are shown in the table on the following pages.
Operation processing time can vary substantially depending on the nature of the sources and destinations of the instructions,
and the values contained in the following tables should therefore be taken as a set of general guidelines to processing times
rather than as being strictly accurate.
When using a file resister (ZR), module access device (Un\G , U3En\G0 to G4095), and link direct device (Jn\ ), add the
processing time shown in Page 744, Appendix 1.3(5) to that of the instruction.
(1) Sequence instructions
Instruction Condition (Device)
Processing Time (µs)
Qn QnH QnPH QnPRH
LD
LDI
AND
ANI
OR
ORI
–– 0.079 0.034 0.034 0.034
LDP
LDF
ANDP
ANDF
ORP
ORF
–– 0.158 0.068 0.068 0.068
ANB
ORB
MPS
MRD
MPP
–– 0.079 0.034 0.034 0.034
INV
When not executed
0.079 0.034 0.034 0.034
When executed
MEP
MEF
When not executed
0.173 0.073 0.073 0.073
When executed
EGP
EGF
When not executed
(OFF OFF)
(ON ON)
0.158 0.068 0.068 0.068
When executed
(OFF ON)
(ON OFF)
OUT
When not changed
(OFF OFF)
(ON ON)
0.158 0.068 0.068 0.068
When changed
(OFF ON)
(ON OFF)
0.158 0.068 0.068 0.068
F
When OFF 2.8 1.2 1.2 1.2
When
ON
When displayed 162 69.7 69.7 69.7
Display completed 126 54 54 54
T
When not executed 0.63 0.27 0.27 0.27
When
executed
After time up 0.63 0.27 0.27 0.27
When added
K 0.63 0.27 0.27 0.27
D 0.63 0.27 0.27 0.27
C
When not executed 0.63 0.27 0.27 0.27
When
executed
After time up 0.63 0.27 0.27 0.27
When added
K 0.63 0.27 0.27 0.27
D 0.63 0.27 0.27 0.27
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