The A and X register contents
are
lost. The X register must
be
set to four before the call.
On
return,
X
= 8 and
AI
D channel 7
is
selected. The
AI
D test
uses
the internal voltage references and confirms
port connections.
6.4 TIMER SELF-CHECK SUBROUTINE
The timer self-check
is
called at location
$FCF
for the MC6805R2/MC6805U2 and at location
$F6D
for the MC6805R3/MC6805U3. If any error was found,
it
returns with the Z bit cleared; otherwise
the Z bit
is
set.
In
order
to
work correctly
as
a user subroutine, the internal phase
two
clock must
be
the clocking
source and interrupts must
be
disabled. Also,
on
exit, the clock
is
running and the interrupt mask
is
not set
so
the caller must protect from interrupts if necessary.
The A and X register contents
are
lost. The timer self-check routine
in
the MC6805R2/U2 counts
how
many times the clock counts in
128
cycles. The number of counts should
be
a power
of
two
since the prescaler
is
a power of two. If not, the timer probably
is
not counting correctly. The
routine
also detects a timer which
is
not running. In the MC6805R3/U3, this routine sets the
prescaler fordivide-by-128 and the timer data register
is
cleared. The X register
is
configured to
count down the same
as
the timer data register. The
two
registers
are
then compared every
128
cycles until they both count down to zero. Any mismatch during the count down
is
considered
an
error.
In
the MC6805R3/U3, the A and X registers
are
cleared
on
exit from the routine.
6-3/6-4
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