10.2 ADDRESSING MODES
The microcomputers have ten addressing modes available for
use
by the programmer. They
are
ex-
plained briefly
in
the following paragraphs. For additional details
and
illustrations, refer to the
M6805 HMOSIM146805 CMOS Family Microcomputer/Microprocessor User's Manual.
The term
"effective address"
(EA)
is
used
in
describing the addressing modes.
EA
is
defined
as
the
address from which the argument for
an
instruction
is
fetched or stored.
10.2.1
Immediate
In
the immediate addressing mode, the operand
is
contained
in
the byte immediately following the
opcode. The immediate addressing mode
is
used
to access constants which do not change during
program execution
(e.
g., a constant
used
to initialize a loop counter).
10.2.2 Direct
In
the direct addressing mode, the effective address of the argument
is
contained
in
a single byte
following the opcode byte. Direct addressing allows the user to directly address the lowest
256
bytes
in
memory with a single two-byte instruction. This address
area
includes
all
on-chip
RAM
and
I/O
registers
and
128
bytes of
ROM.
Direct addressing
is
an
effective
use
of both memory
and
time.
10.2.3 Extended
In
the extended addressing mode, the effective address of the argument
is
contained
in
the
two
bytes following the opcode. Instructions with extended addressing modes
are
capable of referenc-
ing arguments anywhere
in
memory with a single three-byte instruction. When using the Motorola
assembler,
the user
need
·not specify whether
an
instruction
uses
direct or extended addressing.
The
assembler automatically selects the shortest form of the instruction.
10.2.4 Relative
The relative addressing mode
is
only
used
in
branch instructions.
In
relative addressing, the con-
tents of the 8-bit signed byte (the offset)
following the opcode
is
added to the
PC
if, and only if, the
branch condition
is
true. Otherwise, control proceeds to the next instruction. The
span
of
relative
addressing
is
from
-126
to
+
129
from the opcode address. The programmer
need
not worry about
calculating the correct offset if
he
uses
the Motorola assembler, since it calculates the proper offset
and checks
to
see
if it
is
within the span of the branch.
10.2.5 Indexed, No Offset
In
the indexed, no offset addressing mode, the effective address of the argument
is
contained
in
the
8-bit index register. Thus, this addressing mode
can
access the first
256
memory locations. These
instructions
are
only
on
byte long. This mode
is
often
used
to move a pointer through a table or to
hold the address of a frequently referenced RAM or
I/O
location.
10.2.6 Indexed,
8-Bit Offset
In
the indexed, 8-bit offset addressing mode, the effective address
is
the sum of the contents of the
unsigned 8-bit index register and the unsigned byte
following the opcode. This addressing mode
is
10-2
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