Figure 46. PFI Filter Example
1 2 31 4 1 2 3 4 5
PFI Terminal
Filtered input goes
high when terminal
is sampled high on
five consecutive filter
clocks.
Filter Clock
Filtered Input
Counters with NI-DAQmx
The cRIO controller has four general-purpose 32-bit counter/timers and one frequency
generator. The general-purpose counter/timers can be used for many measurement and pulse
generation applications. The figure below shows the cRIO controller Counter 0 and the
frequency generator. All four counters on the cRIO controller are identical.
Figure 47. Controller Counter 0 and Frequency Generator
Counter 0
Counter 0 Source (Counter 0 Timebase)
Counter 0 Aux
Counter 0 HW Arm
Counter 0 A
Counter 0 B (Counter 0 Up_Down)
Counter 0 Z
Counter 0 Gate
Counter 0 Internal Output
Counter 0 TC
Input Selection Muxes
Frequency Generator
Frequency Output Timebase
Freq Out
Input Selection Muxes
Embedded Ctr0
FIFO
Counter 0 Sample Clock
Counters have eight input signals, although in most applications only a few inputs are used.
For information about connecting counter signals, refer to the Default Counter/Timer Routing
section.
Each counter has a FIFO that can be used for buffered acquisition and generation. Each
counter also contains an embedded counter (Embedded Ctrn) for use in what are traditionally
two-counter measurements and generations. The embedded counters cannot be programmed
independent of the main counter; signals from the embedded counters are not routable.
NI cRIO-905x User Manual | © National Instruments | 63
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