4-38 BIOS Setup
The options you can set on the Master Latency Timer submenu and their functions are
shown in the following table.
Table 4-16. Master Latency Timer Submenu
Item Option Description
HBB #N (W/X/Y/Z) [00h] ~ F8h HBB #N (W/X/Y/Z):
N: HBB number (0 - 63)
W: Cell number (0 - 7)
X: IOC number (0 - 1)
Y: GSL number (0 - 1)
Z: PCI bus number (0 - 1)
Displays/sets the Master Latency Timer of the host PCI
bus bridge.
Setting values are in units of 8.
Press the “+” key to increment it. Press the “–“ key to
decrement it.
[ ]: Default setting
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