Neoway N723-EA - GPIO Interfaces; RF Interface; ANT_MAIN;ANT_DIV Antenna Interfaces

N723-EA Hardware User Guide
Chapter 5 Application Interfaces
Copyright © Neoway Technology Co., Ltd. All rights reserved.
55
⚫
Control the equal length for the SDIO interface. For the specific equal length requirements, see
the requirements of the corresponding WLAN chip or module.
⚫
Spacing between DATA traces should be larger than 2 times trace width.
⚫
Control the impedance for each SDIO trace to 50 Ω.
5.5 GPIO interfaces
Signal
Pin
I/O
Function description
Remarks
GPIO_12
67
B
GPIO with interrupt
This pin is pulled up to V1.8 V by default.
Leave this pin floating if it is not used.
GPIO_05
68
B
GPIO with interrupt
This pin is pulled up to V1.8 V by default.
Leave this pin floating if it is not used.
GPIO_04
71
B
GPIO with interrupt
This pin is pulled up to V1.8 V by default.
Leave this pin floating if it is not used.
GPIO_13
72
B
GPIO with interrupt
This pin is pulled down to GND by default.
Leave this pin floating if it is not used.
N723-EA provides 4 GPIO interfaces, all of which have the interrupt function. The AT commands can
be used to control the GPIO status. For more details about the GPIO interfaces, contact Neoway FAEs.
The default function of the GPIO pin may vary with different firmware versions. If you need to use the GPIO
interrupt function, contact Neoway FAEs.
5.6 RF Interface
Signal
Pin
I/O
Function description
Remarks
ANT_MAIN
76
AI
2G/3G/4G main antenna pin
50 Ω impedance characteristics
ANT_DIV
94
AI
4G diversity antenna pin
5.6.1 ANT_MAIN/ANT_DIV Antenna Interfaces
The MAIN/DIV antenna interface of the N723-EA module requires the 50 Ω impedance characteristic.
The impedance of the cable from the module interface to the antenna needs to be kept within the
impedance range to ensure RF performance. Therefore, you should control the impedance of the
traces between the pins and antenna to ensure the RF performance. An impedance matching circuit,