Neoway N723-EA

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N723-EA Hardware User Guide

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Main Page

Table of Contents3
Safety Recommendations10
About N723-EA11
Product Overview11
Block Diagram11
Table 2-1 Variant and Frequency Bands11
Basic Features12
Figure 2-1 Block Diagram12
Reference Standards15
Module Pins16
Pin Layout16
Figure 4-1 N723-EA Pin Definition (Top View)16
Pin Description17
Table 4-1 Pin Description17
Table 4-2 Level Feature17
Table 4-3 Pin Description19
Application Interfaces25
Power Interface25
Vbat25
Figure 5-1 Voltage Drop of the Power Supply26
Figure 5-2 Recommended Design 126
Figure 5-3 Recommended Design 227
Figure 5-4 Recommended Design 328
Figure 5-5 Recommended Design 429
Vdd_1P830
Control Interfaces30
Pwrkey_N31
Pwrkey32
Figure 5-6 Reference Design of Startup, Shutdown, and Reset Controlled by a Button32
Figure 5-7 Reference Design of Startup, Shutdown, and Reset Controlled by an MCU32
Figure 5-8 Reference Design of Automatic Start Once Powered up33
Figure 5-9 Startup Process (by Controlling PWRKEY_N)33
Figure 5-10 Startup Process (by Controlling PWRKEY)34
Figure 5-11 Reset Process of the Module35
Usb_Boot36
Figure 5-12 Hardware Shutdown Process36
Figure 5-13 Reference Design of USB Force Download36
Sleep37
Figure 5-14 Process of Entering the Sleep Mode37
Figure 5-15 Process of Exiting from Sleep Mode38
Figure 5-16 Incoming Call Service Process38
Peripheral Interfaces39
Usb39
Figure 5-17 Outgoing Call Service Process39
Figure 5-18 Reference USB Connection Design40
Uart41
Figure 5-19 Reference Design of the UART Connection41
Figure 5-20 Recommended Level Shifting Circuit 142
Figure 5-21 Recommended Level Shifting Circuit 243
Figure 5-22 Recommended Level Shifting Circuit 344
Usim45
Figure 5-23 Reference Design of the USIM Card Interface45
Figure 5-24 Reference Design of the USIM Card (Without Hot-Swap) Interface46
Sd/Emmc47
Figure 5-25 Reference Design of the SDC Interface47
I2S48
Spi49
Figure 5-26 Reference Design of the I2S49
I2C50
Figure 5-27 SPI Reference Design50
Table 5-1 I2C Interface Parameters50
Network and Connection51
Ethernet51
Figure 5-28 Reference Design of the I2C51
Figure 5-29 Reference Design of the RMII Interface52
Sdio/Wlan53
Figure 5-30 Reference Design of the SDIO Interface with a PHY Chip53
Figure 5-31 SDIO Reference Design54
GPIO Interfaces55
RF Interface55
ANT_MAIN/ANT_DIV Antenna Interfaces55
Figure 5-32 L-Type Network56
Figure 5-33 T-Type Network56
Figure 5-34 Π-Type Network56
Antenna Assembling57
Figure 5-35 Recommended RF PCB Design57
Figure 5-36 Murata RF Connector Encapsulation Specifications58
Figure 5-37 RF Cable Connections58
Figure 5-38 Antenna Layout59
Figure 5-39 Layout Around the Antenna59
Multi-Function Interfaces60
Other Interfaces60
Ring60
Figure 5-40 Pulse Wave for an Incoming Call60
Table 5-2 Pin Definition Description60
Net_Light61
Figure 5-41 RING Indicator for SMS61
Figure 5-42 Driving LED with a Triode61
Electrical Characteristics and Reliability62
Electrical Characteristics62
Table 6-1 N723-Eaelectrical Characteristics62
Table 6-2 N723-EA Current Consumption (Typical)62
Temperature Characteristics63
ESD Protection63
Table 6-3 N723-EA Temperature Features63
Table 6-4 N723-EA ESD Protection Features63
RF Characteristics64
Operating Band64
Table 7-1 N723-EA Operating Bands64
TX Power and RX Sensitivity65
Table 7-2 N723-EA RF Transmit Power65
Table 7-3 GSM RX Sensitivity of N723-EA65
Table 7-4 N723-EA WCDMA RX Sensitivity65
Table 7-5 LTE RX Sensitivity of N723-EA66
Mechanical Characteristics67
Dimensions67
Figure 8-1 N723-EA Dimensions (Unit: MM)67
Label68
Packing68
Tray68
Figure 8-2 N723-EA Label68
Moisture69
Figure 8-3 Packing Process69
Mounting70
PCB Package70
Figure 9-1 N723-EA Bottom View of PCB Package (Unit: MM)70
Application Foot Print71
Stencil71
Figure 9-2 N723-EA Recommended Footprint of the Pplication PCB (Unit: MM)71
Solder Paste72
SMT Oven Temperature Profile72
Figure 9-3 Oven Temperature Profile72
Abbreviation74

Neoway N723-EA - Page 9

Table of Contents