mlxconfig -d <device> s PCI_BUS12_SPEED=4
mlxconfig -d <device> s PCI_BUS14_HIERARCHY_TYPE=1
mlxconfig -d <device> s PCI_BUS14_WIDTH=3
mlxconfig -d <device> s PCI_BUS14_SPEED=4
mlxconfig -d <device> s PCI_BUS16_HIERARCHY_TYPE=1
mlxconfig -d <device> s PCI_BUS16_WIDTH=3
mlxconfig -d <device> s PCI_BUS16_SPEED=4
5.12.2 DPU ARMs as Root Port on Peripherals
In this scenario, the x16 PCIe Gold Fingers of the BlueField-3 DPU serve as an endpoint to the host
server (default), while the additional x16 PCIe lanes are accessible via the Cabline CA-II Plus
connector, bifurcated into four PCIe links, where each link comprises x4 PCIe lanes.
In this configuration the DPU’s Arm cores function as Root Port of the downstream devices
connected to the Cabline CA-II Plus connector, and these remain unexposed to the host server on its
PCIe.
As seen in the below visual representation of this configuration, the DPU ARMs operate as the Root
Port, with bifurcation into four PCIe links on the Cabline CA-II Plus connector, where each link
incorporates x4 PCIe lanes.
The required set of configurations to implement this bifurcation is outlined below:
mlxconfig -d <device> s PCI_BUS00_HIERARCHY_TYPE=0
mlxconfig -d <device> s PCI_BUS00_WIDTH=5
mlxconfig -d <device> s PCI_BUS00_SPEED=4
•
•
Important Notes:
mlxconfig can be configured either through the host in NIC Mode and DPU Mode, or
directly from the DPU’s Arm running OS.
This configuration is persistent even following resets and NIC firmware updates.
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