External Memory Controller (EMC) 56 May 03, 2004
Philips Semiconductors Preliminary User Manual
LPC2119/2129/2194/2292/2294ARM-based Microcontroller
3. EXTERNAL MEMORY CONTROLLER (EMC)
This module is available in LPC2292 and LPC2294 only.
FEATURES
• Supports static memory-mapped devices including RAM, ROM, flash, burst ROM, and some external I/O devices.
• Asynchronous page mode read operation in non-clocked memory subsystems
• Asynchronous burst mode read access to burst mode ROM devices
• Independent configuration for up to four banks, each up to 16M Bytes
• Programmable bus turnaround (idle) cycles (1 to 16)
• Programmable read and write WAIT states (up to 32), for static RAM devices
• Programmable initial and subsequent burst read WAIT state, for burst ROM devices
• Programmable write protection
• Programmable burst mode operation
• Programmable external data width, 8, 16, or 32 bits
• Programmable read byte lane enable control
DESCRIPTION
The external Static Memory Controller is an AMBA AHB slave module which provides an interface between an AMBA AHB
system bus and external (off-chip) memory devices. It provides support for up to four independently configurable memory banks
simultaneously. Each memory bank is capable of supporting SRAM, ROM, Flash EPROM, Burst ROM memory, or some external
I/O devices
Each memory bank may be 8, 16, or 32 bits wide.
This module is available in LPC2219 and LPC2294only. Since this 144 pin package pins out address lines A[23:0], the decoding
among the four banks uses address bits A[25:24]. The native location of the four banks is at the start of the External Memory
area identified in Figure 2 on page 48, but Bank 0 can be used for initial booting under control of the state of the BOOT[1:0] pins.
Bank Address Range Configuration Register
0 8000 0000 - 80FF FFFF BCFG0
1 8100 0000 - 81FF FFFF BCFG1
2 8200 0000 - 82FF FFFF BCFG2
3 8300 0000 - 83FF FFFF BCFG3
Table 5: Address Ranges of External Memory Banks (LPC2292/2294only)
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