FSE Status Reporting System
1065.6016.12 5.29 E-16
STATus QUEStionable:POWer Register
This register comprises all information about possible overloads of the unit.
It can be queried with commands STATus:QUEStionable :POWer:CONDition? and "STATus
:QUEStionable:POWer [:EVENt]?.
Table 5-9 Meaning of bits in STATus:QUEStionable:POWer register
Bit No. Meaning
0
OVERload (Screen A)
This bit is set if the RF input is overloaded. ’OVLD’ will then be displayed.
1
UNDerload (Screen A) - Option FSE-B7
This bit is set if, during measurements in vector analyzer mode without capture buffer used, the lower level limit
in the IF path is violated.
2
IF_OVerload (Screen A)
This bit is set if the IF path is overloaded. ’IFOVLD’ will then be displayed.
3 not used
4 not used
5 not used
6 not used
7 not used
8
OVERload (Screen B)
This bit is set if the RF input is overloaded. ’OVLD’ will then be displayed.
9
UNDerload (Screen B) - Option FSE-B7
This bit is set if, during measurements without capture buffer used, the lower level limit in the IF path is violated.
10
IF_OVerload (Screen B)
This bit is set if the IF path is overloaded. ’IFOVLD’ will then be displayed.
11 not used
12 not used
13 not used
14 not used
15 This bit is always 0.