MC9S08QE128 MCU Series Reference Manual, Rev. 2
Freescale Semiconductor 11
Section Number Title Page
Chapter 6
Parallel Input/Output Control
6.1 Port Data and Data Direction ........................................................................................................111
6.2 Pull-up, Slew Rate, and Drive Strength .........................................................................................112
6.2.1 Port Internal Pull-Up Enable ...........................................................................................112
6.2.2 Port Slew Rate Enable ....................................................................................................112
6.2.3 Port Drive Strength Select ...............................................................................................112
6.3 Port Data Set, Clear and Toggle Data Registers ............................................................................113
6.3.1 Port Data Set Registers ...................................................................................................114
6.3.2 Port Data Clear Registers ................................................................................................114
6.3.3 Port Data Toggle Register ...............................................................................................114
6.4 Pin Behavior in Stop Modes ..........................................................................................................114
6.5 Parallel I/O and Pin Control Registers ..........................................................................................114
6.5.1 Port A Registers ..............................................................................................................115
6.5.2 Port B Registers ..............................................................................................................117
6.5.3 Port C Registers ..............................................................................................................119
6.5.4 Port D Registers ..............................................................................................................123
6.5.5 Port E Registers ...............................................................................................................125
6.5.6 Port F Registers ...............................................................................................................129
6.5.7 Port G Registers ..............................................................................................................131
6.5.8 Port H Registers ..............................................................................................................133
6.5.9 Port J Registers ...............................................................................................................135
Chapter 7
Keyboard Interrupt (S08KBIV2)
7.1 Introduction ...................................................................................................................................139
7.1.1 KBI Clock Gating ...........................................................................................................139
7.1.2 Features ...........................................................................................................................139
7.1.3 Modes of Operation ........................................................................................................139
7.1.4 Block Diagram ................................................................................................................140
7.2 External Signal Description ..........................................................................................................140
7.3 Register Definition ........................................................................................................................141
7.3.1 KBI Interrupt Status and Control Register (KBIxSC) ....................................................141
7.3.2 KBI Interrupt Pin Select Register (KBIxPE) ..................................................................142
7.3.3 KBI Interrupt Edge Select Register (KBIxES) ...............................................................142
7.4 Functional Description ..................................................................................................................142
7.4.1 Edge Only Sensitivity .....................................................................................................143
7.4.2 Edge and Level Sensitivity ..............................................................................................143
7.4.3 Pull-Up/Pull-Down Resistors ..........................................................................................143
7.4.4 Keyboard Interrupt Initialization ....................................................................................143