Chapter 2 Pins and Connections
MC9S08QE128 MCU Series Reference Manual, Rev. 2
34 Freescale Semiconductor
the pin will remain RESET until the next POR. The RESET pin can be used to reset the MCU from an
external source when the pin is driven low. When enabled as the
RESET pin (RSTPE = 1), the pin is
configured as an input only with an internal pullup device automatically enabled.
NOTE
This pin does not contain a clamp diode to V
DD
and should not be driven
above V
DD
.
NOTE
The
RESET pin is pulled to V
DD
internally. The external voltage measured
on the
RESET pin will be less than V
DD
. Therefore, the RESET pullup
should not be used to pullup components external to the MCU.
NOTE
In EMC-sensitive applications, an external RC filter is recommended on the
RESET pin, if enabled. See Figure 2-6 for an example.
After a power-on reset (POR), the PTC4/TPM3CH4/RSTO pin defaults to a general-purpose port pin,
PTC4. Setting RSTOPE in SOPT1 configures the pin to be the
RSTO pin. After configured as RSTO, the
pin will remain
RSTO until the next POR. The RSTO pin will reflect the current state of the internal MCU
reset signal. As long as the MCU is not in a reset state, the
RSTO pin will drive high. Whenever the MCU
is in a reset state, this pin will drive low until the internal reset signal is released. When enabled as the
RSTO pin (RSTOPE = 1), the pin is automatically configured as an output only. The RSTO pin can be
enabled independently of the
RESET pin.
2.2.4 Background / Mode Select (BKGD/MS)
During a power-on-reset (POR) or background debug force reset (see Section 5.8.3, “System Background
Debug Force Reset Register (SBDFR),” for more information), the PTA4/ACMPO/BKGD/MS pin
functions as a mode select pin. Immediately after any reset, the pin functions as the background pin and
can be used for background debug communication. When enabled as the BKGD/MS pin (BKGDPE = 1),
an internal pullup device is automatically enabled.
The background debug communication function is enabled when BKGDPE in SOPT1 is set. BKGDPE is
set following any reset of the MCU and must be cleared to use the PTA4/ACMPO/BKGD/MS pin’s
alternative pin functions.
If nothing is connected to this pin, the MCU will enter normal operating mode at the rising edge of the
internal reset after a POR or force BDC reset. If a debug system is connected to the 6-pin standard
background debug header, it can hold BKGD/MS low during a POR or immediately after issuing a back-
ground debug force reset, which will force the MCU to active background mode.
The BKGD/MS pin is used primarily for background debug controller (BDC) communications using a
custom protocol that uses 16 clock cycles of the target MCU’s BDC clock per bit time. The target MCU’s
BDC clock could be as fast as the bus clock rate, so there should never be any significant capacitance
connected to the BKGD/MS pin that could interfere with background serial communications.