Chapter 6 Parallel Input/Output Control
MC9S08QE128 MCU Series Reference Manual, Rev. 2
Freescale Semiconductor 129
6.5.5.8 Port E Drive Strength Selection Register (PTEDS)
6.5.6 Port F Registers
Port F is controlled by the registers listed below.
76543210
R
PTEDS7 PTEDS6 PTEDS5 PTEDS4 PTEDS3 PTEDS2 PTEDS1 PTEDS0
W
Reset: 00000000
Figure 6-33. Drive Strength Selection for Port E Register (PTEDS)
Table 6-31. PTEDS Register Field Descriptions
Field Description
7:0
PTEDS[7:0]
Output Drive Strength Selection for Port E Bits — Each of these control bits selects between low and high
output drive for the associated PTE pin. For port E pins that are configured as inputs, these bits have no effect.
0 Low output drive strength selected for port E bit n.
1 High output drive strength selected for port E bit n.