ROHS MC9S08QE128 - General-Purpose I;O and Peripheral Ports; Refh Refl

Chapter 2 Pins and Connections
MC9S08QE128 MCU Series Reference Manual, Rev. 2
Freescale Semiconductor 35
Although the BKGD/MS pin is a pseudo open-drain pin, the background debug communication protocol
provides brief, actively driven, high speedup pulses to ensure fast rise times. Small capacitances from
cables and the absolute value of the internal pull-up device play almost no role in determining rise and fall
times on the BKGD/MS pin.
2.2.5 ADC Reference Pins (V
REFH
, V
REFL
)
The V
REFH
and V
REFL
pins are the voltage reference high and voltage reference low inputs, respectively,
for the ADC module. In the 32-pin package, V
REFH
and V
REFL
are shared with V
DDA
and V
SSA
,
respectively.
2.2.6 General-Purpose I/O and Peripheral Ports
The MC9S08QE128 Series of MCUs support up to 70 general-purpose I/O pins 1 input-only pin, and 1
output-only pin, which are shared with on-chip peripheral functions (timers, serial I/O, ADC, ACMP, etc.).
When a port pin is configured as a general-purpose output or a peripheral uses the port pin as an output,
software can select one of two drive strengths and enable or disable slew rate control. When a port pin is
configured as a general-purpose input or a peripheral uses the port pin as an input, software can enable a
pull-up device. Immediately after reset, all of these pins are configured as high-impedance general-purpose
inputs with internal pull-up devices disabled.
PTA5 is a special-case input pin. When the PTA5/IRQ/TCLK/
RESET pin is configured as PTA5 with the
pullup enabled, the voltage observed on the pin will not be pulled to V
DD
. However, the internal voltage
on the PTA5 node will be at VDD.
When an on-chip peripheral system is controlling a pin, data direction control bits still determine what is
read from port data registers even though the peripheral module controls the pin direction by controlling
the enable for the pin’s output buffer. For information about controlling these pins as general-purpose I/O
pins, see Chapter 6, “Parallel Input/Output Control.”
NOTE
To avoid extra current drain from floating input pins, the reset initialization
routine in the application program should either enable on-chip pull-up
devices or change the direction of unused or non-bonded pins to outputs so
they do not float.