ROHS MC9S08QE128 - Page 116

Chapter 6 Parallel Input/Output Control
MC9S08QE128 MCU Series Reference Manual, Rev. 2
116 Freescale Semiconductor
6.5.1.3 Port A Pull Enable Register (PTAPE)
The port A enable register (PTAPE) enables pull-ups on the corresponding PTA pin. In some cases, a
pull-down device will be enabled if pull-downs are supported by an alternative pin function, such as KBI.
6.5.1.4 Port A Slew Rate Enable Register (PTASE)
76543210
R
PTAPE7 PTAPE6 PTAPE5 PTAPE4
1
1
PTAPE4 has no effect on the output-only PTA4 pin.
PTAPE3 PTAPE2 PTAPE1 PTAPE0
W
Reset: 00000000
Figure 6-5. Internal Pull Enable for Port A Register (PTAPE)
Table 6-3. PTAPE Register Field Descriptions
Field Description
7:0
PTAPE[7:0]
Internal Pull Enable for Port A Bits — Each of these control bits determines if the internal pull-up or pull-down
device is enabled for the associated PTA pin. For port A pins that are configured as outputs, these bits have no
effect and the internal pull devices are disabled.
0 Internal pull-up/pull-down device disabled for port A bit n.
1 Internal pull-up/pull-down device enabled for port A bit n.
76543210
R
PTASE7 PTASE6 PTASE5
1
1
PTASE5 will have no effect on the input-only PTA5 pin.
PTASE4 PTASE3 PTASE2 PTASE1 PTASE0
W
Reset: 00000000
Figure 6-6. Slew Rate Enable for Port A Register (PTASE)
Table 6-4. PTASE Register Field Descriptions
Field Description
7:0
PTASE[7:0]
Output Slew Rate Enable for Port A Bits — Each of these control bits determines if the output slew rate control
is enabled for the associated PTA pin. For port A pins that are configured as inputs, these bits have no effect.
0 Output slew rate control disabled for port A bit n.
1 Output slew rate control enabled for port A bit n.