ROHS MC9S08QE128 - Page 52

Chapter 4 Memory
MC9S08QE128 MCU Series Reference Manual, Rev. 2
52 Freescale Semiconductor
Figure 4-2. MC9S08QE96 Memory Map
PPAGE=6
PPAGE=7
0x18000-0x1BFFF
0x1C000-0x1FFFF
Extended
Address
RESERVED
16384 BYTES
FLASH
16384 BYTES
PPAGE=4
PPAGE=5
0x10000-0x13FFF
0x14000-0x17FFF
DIRECT PAGE
RAM
6016 BYTES
0x0000
0x007F
0x0080
0x1800
0x17FF
0x187F
0x0FFFF
128 BYTES
HIGH
128 BYTES
FLASH
16384 BYTES
0x1880
RESERVED
2048 BYTES
0x207F
0x3FFF
0x2080
FLASH
8064 BYTES
16384 BYTES
0x07FFF
0x0C000
0x04000
REGISTERS
0x0BFFF
0x08000
PAGE REGISTERS
PPAGE=1
FLASH
16384 BYTES
PPAGE=0
FLASH
FLASH
16384 BYTES
PPAGE=3
PPAGE=0
PPAGE=1
PPAGE=2
PPAGE=3
0x00000
0x03FFF
0x00000-0x03FFF
0x04000-0x07FFF
0x08000-0x0BFFF
0x0C000-0x0FFFF
When the CPU
accesses PPAGE 0
directly, RAM and
registers, when present,
take priority over flash
memory.
Extended Address CPU Address
Extended Address
0xFFFF
0x7FFF
0xC000
0x4000
0xBFFF
0x8000
Paging Window -
Extended
addresses formed
with PPAGE and
A13:A0 of CPU
address
When PPAGE 0 is
accessed through the
linear address pointer
or through the paging
window, the flash
memory is read.