Chapter 4 Memory
MC9S08QE128 MCU Series Reference Manual, Rev. 2
54 Freescale Semiconductor
0xFFCE:0xFFCF RTC Vrtc
0xFFD0:0xFFD1 SCI2 Transmit Vsci2tx
0xFFD2:0xFFD3 SCI2 Receive Vsci2rx
0xFFD4:0xFFD5 SCI2 Error Vsci2err
0xFFD6:0xFFD7 ACMPx
1
Vacmpx
0xFFD8:0xFFD9 ADC Conversion Vadc
0xFFDA:0xFFDB KBIx Interrupt
2
Vkeyboard
0xFFDC:0xFFDD IICx
3
Viicx
0xFFDE:0xFFDF SCI1 Transmit Vsci1tx
0xFFE0:0xFFE1 SCI1 Receive Vsci1rx
0xFFE2:0xFFE3 SCI1 Error Vsci1err
0xFFE4:0xFFE5 SPI1 Vspi1
0xFFE6:0xFFE7 SPI2 Vspi2
0xFFE8:0xFFE9 TPM2 Overflow Vtpm2ovf
0xFFEA:0xFFEB TPM2 Channel 2 Vtpm2ch2
0xFFEC:0xFFED TPM2 Channel 1 Vtpm2ch1
0xFFEE:0xFFEF TPM2 Channel 0 Vtpm2ch0
0xFFF0:0xFFF1 TPM1 Overflow Vtpm1ovf
0xFFF2:0xFFF3 TPM1 Channel 2 Vtpm1ch2
0xFFF4:0xFFF5 TPM1 Channel 1 Vtpm1ch1
0xFFF6:0xFFF7 TPM1 Channel 0 Vtpm1ch0
0xFFF8:0xFFF9 Low Voltage Detect or Low Voltage Warning Vlvd
0xFFFA:0xFFFB IRQ Virq
0xFFFC:0xFFFD SWI Vswi
0xFFFE:0xFFFF Reset Vreset
1
ACMP1 and ACMP2 share this vector, if both modules are enabled user should poll each flag
to determine pending interrupt.
2
KBI1 and KBI2 share this vector, if both modules are enabled user should poll each flag to
determine pending interrupt.
3
IIC1 and IIC2 share this vector, if both modules are enabled user should poll each flag to
determine pending interrupt.
Table 4-1. Reset and Interrupt Vectors (continued)
Address
(High/Low)
Vector Vector Name