ROHS MC9S08QE128 - Page 73

Chapter 4 Memory
MC9S08QE128 MCU Series Reference Manual, Rev. 2
Freescale Semiconductor 73
CBEIE, CCIE and KEYACC bits are readable and writable while all remaining bits read 0 and are not
writable. KEYACC is only writable if KEYEN is set to the enabled state (see Section 4.6.2.2, “Flash
Options Register (FOPT and NVOPT)”.
NOTE
Flash array reads are allowed while KEYACC is set.
4.6.2.4 Flash Protection Register (FPROT and NVPROT)
The FPROT register defines which flash sectors are protected against program or erase operations.
FPROT bits are readable and writable as long as the size of the protected flash memory is being increased.
Any write to FPROT that attempts to decrease the size of the protected flash memory will be ignored.
During the reset sequence, the FPROT register is loaded from the flash protection byte, NVPROT. To
change the flash protection that will be loaded during the reset sequence, the flash sector containing
NVPROT must be unprotected and erased, then NVPROT can be reprogrammed.
Trying to alter data in any protected area in the flash memory will result in a protection violation error and
the FPVIOL flag will be set in the FSTAT register. The mass erase of the flash array is not possible if any
of the flash sectors contained in the flash array are protected.
Table 4-16. FCNFG Field Descriptions
Field Description
5
KEYACC
Enable Security Key Writing
0 Writes to the flash block are interpreted as the start of a command write sequence.
1 Writes to the flash block are interpreted as keys to open the backdoor.
76543210
R
FPS FPOPEN
W
Reset F F FFFFFF
Figure 4-13. Flash Protection Register (FPROT)
Table 4-17. FPROT Field Descriptions
Field Description
7:1
FPS[6:0]
Flash Protection Size — With FPOPEN set, the FPS bits determine the size of the protected flash address
range as shown in Table 4-18.
0
FPOPEN
Flash Protection Open
0 Flash array fully protected.
1 Flash array protected address range determined by FPS bits.