ROHS MC9S08QE128 - Page 79

Chapter 4 Memory
MC9S08QE128 MCU Series Reference Manual, Rev. 2
Freescale Semiconductor 79
4.6.3.2.1 Erase Verify Command
The erase verify operation will verify that a flash block is erased.
An example flow to execute the erase verify operation is shown in Figure 4-16. The erase verify command
write sequence is as follows:
1. Write to a flash block address to start the command write sequence for the erase verify command.
The address and data written will be ignored.
2. Write the erase verify command, 0x05, to the FCMD register.
3. Clear the FCBEF flag in the FSTAT register by writing a 1 to FCBEF to launch the erase verify
command.
After launching the erase verify command, the FCCF flag in the FSTAT register will set after the operation
has completed. The number of bus cycles required to execute the erase verify operation is equal to the
number of addresses in the flash array memory plus several bus cycles as measured from the time the
FCBEF flag is cleared until the FCCF flag is set. Upon completion of the erase verify operation, the
FBLANK flag in the FSTAT register will be set if all addresses in the flash array memory are verified to
be erased. If any address in the flash array memory is not erased, the erase verify operation will terminate
and the FBLANK flag in the FSTAT register will remain clear.