ROHS MC9S08QE128 - Page 81

Chapter 4 Memory
MC9S08QE128 MCU Series Reference Manual, Rev. 2
Freescale Semiconductor 81
3. Clear the FCBEF flag in the FSTAT register by writing a 1 to FCBEF to launch the program
command.
If an address to be programmed is in a protected area of the flash block, the FPVIOL flag in the FSTAT
register will set and the program command will not launch. Once the program command has successfully
launched, the FCCF flag in the FSTAT register will set after the program operation has completed.
Figure 4-17. Example Program Command Flow
4.6.3.2.3 Burst Program Command
The burst program operation will program previously erased data in the flash memory using an embedded
algorithm.
While burst programming, two internal data registers operate as a buffer and a register (2-stage FIFO) so
that a second burst programming command along with the necessary data can be stored to the buffers while
the first burst programming command is still in progress. This pipelined operation allows a time
Write: Flash Array Address
Write: FCMD register
Write: FSTAT register
1.
2.
3.
Write: FSTAT register
yes
no
Access Error and
no
Bit Polling for
Read: FSTAT register
yes
Read: FSTAT register
no
START
yes
FCBEF
Set?
Command
FCCF
Set?
FACCERR/FPVIOL
Set?
Write: FCDIV register
Read: FCDIV register
yes
no
Clock Register
FDIVLD
Set?
NOTE: FCDIV needs to
Written
Check
Protection Violation
Check
Buffer Empty Check
and Program Data
Program Command 0x20
Clear FCBEF 0x80
Clear FACCERR/FPVIOL 0x30
Command Completion
Check
EXIT
be set after each reset