Interrupts/diagnostics alarms
6.2 Interrupts and diagnostics
CPU 1512C-1 PN (6ES7512-1CK01-0AB0)
136 Manual, 12/2017, A5E40898741-AA
Hardware interrupt for inputs
The compact CPU can generate a hardware interrupt for the following events:
● Below low limit 1
● Above high limit 1
● Below low limit 2
● Above high limit 2
You can find detailed information on the event in the hardware interrupt organization block
with the "RALARM" (read additional interrupt information) instruction and in the STEP 7 (TIA
Portal) online help.
The start information of the organization block includes information on which channel of the
analog on-board I/O triggered the hardware interrupt. The figure below shows the
assignment to the bits of double word 8 in local data.
Figure 6-4 Start information of the organization block
Behavior when limits 1 and 2 are reached at the same time
If the two high limits 1 and 2 are reached at the same time, the analog on-board I/O always
signals the hardware interrupt for high limit 1 first. The configured value for high limit 2 is
irrelevant. After processing the hardware interrupt for high limit 1, the compact CPU triggers
the hardware interrupt for high limit 2.
The analog on-board I/O behaves accordingly when the low limits are reached
simultaneously. If the two low limits 1 and 2 are reached at the same time, the analog on-
board I/O always signals the hardware interrupt for low limit 1 first. After processing the
hardware interrupt for low limit 1, the analog on-board I/O triggers the hardware interrupt for
low limit 2.
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