Sony HCD-DX90 - Schematic Diagram - Main (2;3) Section

HCD-DX90
2828
7-7. SCHEMATIC DIAGRAM – MAIN (2/3) SECTION – • See page 21 for Wavefoms. • See page 44 for IC Block Diagrams. • See page 34 for Printed Wiring Board of Head Boards.
RV304
REC BIAS
(L-CH)
RV354
REC BIAS
(R-CH)
RV353
PLAYBACK LEVEL
(DECK B R-CH)
RV303
PLAYBACK LEVEL
(DECK B L-CH)
RV352
PLAYBACK LEVEL
(DECK A R-CH)
RV302
PLAYBACK LEVEL
(DECK A L-CH)
RV351
REC LEVEL
(R-CH)
RV301
REC LEVEL
(L-CH)
N
4.7k
4.7k
C395 0.1
C354
0.1
C304
0.1
2 . 2
2 . 2
22k
100
100
100
470
470
470
100
100
100
100
100
100
100
100
100
1
2
3
TAPE MECHANISM
DECK BLOCK (2/3)
(TCM-230PWR11)
TAPE MECHANISM
DECK BLOCK (3/3)
(TCM-230PWR11)
ERASE
5.6k
MAIN BOARD (3/3)
12K
12K
4.7K
8.2K
4.7k
1.2k
18k
18k
8.2k
4.7k
LEAF SW BOARD
CN1001
MAIN BOARD (3/3)
47k
22k
MAIN BOARD (3/3)
MAIN BOARD (3/3)
MAIN BOARD (3/3)
(Page 29)
(Page 29)
(Page 29)
(Page 29)
(Page 29)
(Page 35)
• Voltages and waveforms are dc with respect to ground
under no-signal conditions.
no mark : CD STOP
( ) : REC
< > : TAPE PB
The components identified by mark 0 or dotted
line with mark 0 are critical for safety.
Replace only with part number specified.