Sony PMC-DR45 - IC Block Diagrams

– 65 – – 66 –
1
2
3
4
8
9
10
11
12
7
18
19
20
21
22
23
24
17
16
15
+
–
+
–
+
–
+
–
+
–
+
–
+
–
+
–
+
–
+
–
6
VEE
VEE
VC
VEE
VCC
VCC
VREF
APC PD AMP
APC LD AMP
VC
VCC
+
–
5
VC
VC
VC
VCC
VEE
+
–
VC
+
–
VC
+
–
+
–
VC
+
–
RF EQ AMPRF SUMMING AMP
VC
ERROR AMP
FOCUS
14
13
VEE
VC
VC
VC BUFFER
TRACKING
ERROR AMP
HOLD
AGCVTH
LD
PD
A
B
C
D
VEE
F
E
VC
VCC
LC/PD
LD ON
HOLD SW
RF BOT
RFTC
RF 1
RF 0
RFE
FE
TE
AGCCONT
(50%/30%
OFF)
28 27 26
+ –
25 24 23 22 21 20 19 18
1 2 3 4 5 6 7
INTERFACE
MUTE
LEVEL SHIFT
INTERFACE
F
R
RF
RF
INTERFACE
R
F
R
F
17 1516
111098 12 1413
VCC
VREF
VCC
VCC
VCC
VCC
VREF NC SPIN SFDR SRDR CAPS GND MUTE VCC SL– SL+ SP– SP+
VREFOUT
FFDR
FRDR
CAP1
TFDR
TRDR
CAP2
GND
VREFIN
VCC
T+ T–
F– F+
IC1 TA2149N
6-25. IC BLOCK DIAGRAMS
IC2 LC72137M-TLM
IC701 CXA2568M
IC703 BA5974FP
GND1
3
2
1
IF REQ
AM
MIX
FM RF-IN
AM LOW CUT
5
4
MIX OUT
VCC2
AF IF-IN
8
7
6
FM IF-IN
GND2
10
9
AGC
QUAD
12
11
R-OUT
L-OUT
FM RF-OUT
22
23
24
20
21
17
18
19
15
16
13
14
AM RF-IN
VCC1
FM OSC
ST-IND
OSC-OUT
AM OSC
IF-OUT
LPF2/MO-ST
MPX- IN
DET-OUT
LPF1/BAND
FM
MIX
FM
OSC
LEVEL
DET
AM
DET
MUTE
FM
DET
ST/MO
FM/AM
AM
OSC
AGC
SW
ST
1/8
BUFF
BUFF
DIVIDE
DECODE
VCO
IF BUFF
AF BUFF
AF
FM RF
AM IF
FM IF
1/1 OR
1/16
11
10
9
8
7
6
5
4
3
2
1
12
13
14
15
16
19
20
UNLOCK
DETECTOR
POWER ON
RESET
UNIVERSAL
COUNTER
CCB
I/F
CE
DI
CL
DO
XOUT
LP-OUT
XIN
LP-IN
PD
VSS
VDD
MO/ST
FM IN
AM IN
MUTE
MW/LW
BAND
ST-IND
BAND
IF IN
PHASE
DETECTOR
CHARGE
PUMP
REFERENCE
DIVIDER
SWALLOW
COUNTER
1/16,1/17
4BITS
12BITS
PROGRAMMABLE
DIVIDER
DATA SHIFT REGISTER
LATCH
1/2
17
18