Sony STR-DA5300ES - Page 155

155
STR-DA5300ES
D-VIDEO BOARD IC3601 FLI8668-LF-BC (VIDEO PROCESSOR)
Pin No.
Pin Name I/O Description
A1
NC - Not used
A2
MSTR1_SDA
O
Power detection signal output to the video system controller
A3
MSTR1_SCL
I
Busy signal input from the video system controller
A4, A5
FSDATA1,
FSDATA3
I/O Two-way data bus with the SD-RAM
A6 FSDQM0 O
Lower data mask signal output to the SD-RAM
A7 to A10
FSDATA5,
FSDATA7,
FSDATA9,
FSDATA11
I/O Two-way data bus with the SD-RAM
A11 FSDQM1 O
Upper data mask signal output to the SD-RAM
A12, A13
FSDATA13,
FSDATA15
I/O Two-way data bus with the SD-RAM
A14
VDDA18_DLL - Power supply terminal (+1.8V)
A15, A16
FSDATA17,
FSDATA19
I/O Two-way data bus with the SD-RAM
A17 FSDQS2 O
Upper data strobe signal output to the SD-RAM
A18 to
A21
FSDATA21,
FSDATA23,
FSDATA25,
FSDATA27
I/O Two-way data bus with the SD-RAM
A22 FSDQS3 O
Lower data strobe signal output to the SD-RAM
A23, A24
FSDATA29,
FSDATA31
I/O Two-way data bus with the SD-RAM
A25, A26
RPLL_AGND - Ground terminal
B1
BDATA0 I Digital video signal (B) input from the OSD controller
B2
OCM_UDO_1
O
UART communication transfer data output to the video system controller
B3
OCM_UDI_1
I
UART communication transfer data input from the video system controller
B4, B5
FSDATA0,
FSDATA2
I/O Two-way data bus with the SD-RAM
B6 FSDQS0 O
Upper data strobe signal output to the SD-RAM
B7 to B10
FSDATA4,
FSDATA6,
FSDATA8,
FSDATA10
I/O Two-way data bus with the SD-RAM
B11 FSDQS1 O
Lower data strobe signal output to the SD-RAM
B12, B13
FSDATA12,
FSDATA14
I/O Two-way data bus with the SD-RAM
B14
VSSA18_DLL - Ground terminal
B15, B16
FSDATA16,
FSDATA18
I/O Two-way data bus with the SD-RAM
B17 FSDQM2 O
Lower data mask signal output to the SD-RAM
B18 to
B21
FSDATA20,
FSDATA22,
FSDATA24,
FSDATA26
I/O Two-way data bus with the SD-RAM
B22 FSDQM3 O
Upper data mask signal output to the SD-RAM
B23, B24
FSDATA28,
FSDATA30
I/O Two-way data bus with the SD-RAM