STR-DA5500ES
140
Pin No. Pin Name I/O Description
A1 GND - Ground terminal
A2 PROG_B - Not used
A3 to A7
in_a<11>, in_a<9>,
in_a<5>, in_a<2>,
in_a<0>
I Digital video signal input from the HDMI receiver
A8 hsync_a I Horizontal sync signal input from the HDMI receiver
A9 clk_a I Output data clock signal input from the HDMI receiver
A10 ctl_data - Not used
A11 vsync_b I Vertical sync signal input from the video processor
A12 hsync_b I Horizontal sync signal input from the video processor
A13 in_b<0> I Digital video signal input terminal Not used
A14 in_b<2> I Digital video signal input from the video processor
A15 TCK I Clock signal input terminal (for JTAG)
A16 GND - Ground terminal
B1 TDI I Data input terminal (for JTAG)
B2 TMS I Mode selection signal input terminal (for JTAG)
B3, B4 in_a<10>, in_a<8> I Digital video signal input from the HDMI receiver
B5 VCCO_0 - Power supply terminal (+3.3V)
B6 in_a<3> I Digital video signal input from the HDMI receiver
B7 GND - Ground terminal
B8 vsync_a I Vertical sync signal input from the HDMI receiver
B9 VCCO_0 - Power supply terminal (+3.3V)
B10 ctl_lat - Not used
B11 GND - Ground terminal
B12 de_b I Data enable signal input from the video processor
B13 VCCO_0 - Power supply terminal (+3.3V)
B14 in_b<1> I Digital video signal input terminal Not used
B15 in_b<3> I Digital video signal input from the video processor
B16 TDO O Data output terminal (for JTAG)
C1, C2 in_a<13>, in_a<12> I Digital video signal input from the HDMI receiver
C3 GND - Ground terminal
C4 to C7
in_a<7>, in_a<6>,
in_a<4>, in_a<1>
I Digital video signal input from the HDMI receiver
C8 de_a I Data enable signal input from the HDMI receiver
C9 clk_b I Output data clock signal input from the video processor
C10 ctl_clk - Not used
C11 - - Not used
C12, C13 in_b<4>, in_b<5> I Digital video signal input from the video processor
C14 GND - Ground terminal
C15, C16 in_b<7>, in_b<8> I Digital video signal input from the video processor
D1 in_a<14> I Digital video signal input from the HDMI receiver
D2 VCCO_3 - Power supply terminal (+3.3V)
D3 in_a<16 > I Digital video signal input from the HDMI receiver
D4 - - Not used
D5 PUDC_B - Not used
D6 to D8 - - Not used
D9 reset I Reset signal input from the video system controller “L”: reset
D10 - - Not used
D11 p_ctl - Not used
D12 p_sel I Digital video signal (for HDMI OUT) selection signal input from the video system controller
D13 p_th I Video processor selection signal input from the video system controller
D14 to
D16
in_b<6>, in_b<9>,
in_b<10>
I Digital video signal input from the video processor
E1 to E3
in_a<15>, in_a<17>,
in_a<18>
I Digital video signal input from the HDMI receiver
E4 - - Not used
D-VIDEO BOARD IC3111 XC3S200AN-4FTG256C-HDSEL01 (HDMI OUTPUT SELECTOR)
w
w
w
.
x
i
a
o
y
u
1
6
3
.
c
o
m
Q
Q
3
7
6
3
1
5
1
5
0
9
9
2
8
9
4
2
9
8
T
E
L
1
3
9
4
2
2
9
6
5
1
3
9
9
2
8
9
4
2
9
8
0
5
1
5
1
3
6
7
3
Q
Q
TEL 13942296513 QQ 376315150 892498299
TEL 13942296513 QQ 376315150 892498299
http://www.xiaoyu163.com
http://www.xiaoyu163.com
To Next Page
Loading...
