The STM32 Cortex-M4 instruction set PM0214
104/262 PM0214 Rev 10
UHSAX R0, R3, R5 ; Subtracts bottom halfword of R5 from top halfword of
; R3 and writes halved result to top halfword of R0
; Adds top halfword of R5 to bottom halfword of R3 and
; writes halved result to bottom halfword of R0.
3.5.20 UHSUB16 and UHSUB8
Unsigned Halving Subtract 16 and Unsigned Halving Subtract 8
Syntax
op{cond}{Rd,} Rn, Rm
Where:
• op is any of the following:
UHSUB16: Performs two unsigned 16-bit integer additions, halves the results, and
writes the results to the destination register.
UHSUB8: Performs four unsigned 8-bit integer additions, halves the results, and writes
the results to the destination register.
• ‘cond’ is an optional condition code (see Conditional execution on page 65).
• ‘Rd’ is the destination register.
• ‘Rn’ is the first register holding the operand.
• ‘Rm’ is the second register holding the operand.
Operation
Use these instructions to add 16-bit and 8-bit data and then to halve the result before writing
the result to the destination register:
The UHSUB16 instruction:
1. Subtracts each halfword of the second operand from the corresponding halfword of the
first operand.
2. Shuffles each halfword result to the right by one bit, halving the data.
3. Writes each unsigned halfword result to corresponding halfword in destination register.
The UHSUB8 instruction:
1. Subtracts each byte of second operand from the corresponding byte of the first
operand.
2. Shuffles each byte result by one bit to the right, halving the data.
3. Writes the unsigned byte results to the corresponding byte of the destination register.
Restrictions
Do not use SP and do not use PC.
Condition flags
These instructions do not change the flags.
Examples
UHSUB16 R1, R0 ; Subtracts halfwords in R0 from corresponding R1 halfword
; and writes halved result to corresponding halfword in R1
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