ST STM32F3 Series

Core peripherals PM0214
224/262 PM0214 Rev 10
4.4.2 CPUID base register (CPUID)
Address offset: 0x00
Reset value: 0x410F C241
Required privilege: Privileged
The CPUID register contains the processor part number, version, and implementation
information.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
Implementer Variant Constant
rrrrrr r r r r rrrrrr
1514131211109876543210
PartNo Revision
rrrrrr r r r r rrrrrr
Bits 31:24 Implementer: Implementer code
0x41: Arm
Bits 23:20 Variant: Variant number
The r value in the rnpn product revision identifier
0x0: revision 0
Bits 19:16 Constant: Reads as 0xF
Bits 15:4 PartNo: Part number of the processor
0xC24: = Cortex-M4
Bits 3:0 Revision: Revision number
The p value in the rnpn product revision identifier, indicates patch release.
0x1: = patch 1