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ST STM32F3 Series User Manual

ST STM32F3 Series
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Page #170 background image
The STM32 Cortex-M4 instruction set PM0214
170/262 PM0214 Rev 10
3.10.20 VMSR
Move to floating-point System Register from Arm Core register.
Syntax
VMSR{cond} FPSCR, Rt
Where:
‘cond’ is an optional condition code, see Conditional execution on page 65.
‘Rt’ is the general-purpose register to be transferred to the FPSCR.
Operation
This instruction moves the value of a general-purpose register to the FPSCR. See Floating-
point status control register (FPSCR) on page 255 for more information.
Restrictions
The restrictions are Rt cannot be PC or SP.
Condition flags
This instruction updates the FPSCR.

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ST STM32F3 Series Specifications

General IconGeneral
SeriesSTM32F3
CoreARM Cortex-M4
Max CPU Frequency72 MHz
Operating Voltage2.0 V to 3.6 V
GPIO PinsUp to 80
TimersAdvanced-control, general-purpose, basic timers
ADC12-bit
DAC12-bit
Communication InterfacesUSART, SPI, I2C, CAN, USB
Operating Temperature-40°C to 85°C
PackageLQFP, UFQFPN, WLCSP

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