High-resolution timer (HRTIM) RM0440
876/2126 RM0440 Rev 4
Figure 202. Complementary outputs for low pulsewidth (SDTRx = 0, SDTFx = 1)
Figure 203. Complementary outputs for low pulsewidth (SDTRx = 1, SDTFx=0)
For safety purposes, it is possible to prevent any spurious write into the deadtime registers
by locking the sign and/or the value of the deadtime using DTFLKx, DTRLKx, DTFSLKx and
DTRSLKx. Once these bits are set, the related bits and bitfields are becoming read only until
the next system reset.
Caution: DTEN bit must not be changed in the following cases:
- When the timer is enabled (TxEN bit set)
- When the timer outputs are set/reset by another timer (while TxEN is reset)
Otherwise, an unpredictable behavior would result.
It is therefore necessary to disable the timer (TxCEN bit reset) and have the corresponding
outputs disabled.
For the particular case where DTEN must be set while the burst mode is enabled with a
deadtime upon entry (BME = 1, DIDL = 1, IDLEM = 1), it is necessary to force the two
outputs in their IDLES state by software commands (SST, RST bits) before setting DTEN bit.
This is to avoid any side effect resulting from a burst mode entry that would happen
immediately before a deadtime enable.
27.3.5 Master timer
The main purpose of the master timer is to provide common signals to the 6 timing units,
either for synchronization purpose or to set/reset outputs. It does not have direct control
over any outputs, but still can be used indirectly by the set/reset crossbars.
MS32274V3
HRTIM_CHx1
HRTIM_CHx2
Ref.
Deadtime falling
and rising skipped
Deadtime falling
and rising skipped
MS32275V3
HRTIM_CHx1
HRTIM_CHx2
Ref.
Deadtime Falling
and rising skipped
Deadtime Falling
and rising skipped
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