PM0214 Rev 9 169/262
PM0214 The STM32 Cortex-M4 instruction set
261
3.10.19 VMRS
Move to Arm Core register from floating-point System Register.
Syntax
VMRS{cond} Rt, FPSCR
VMRS{cond} APSR_nzcv, FPSCR
Where:
• ‘cond’ is an optional condition code, see Conditional execution on page 65.
• ‘Rt’ is the destination Arm core register. This register can be R0-R14.
• ‘APSR_nzcv’ Transfer floating-point flags to the APSR flags.
Operation
This instruction performs one of the following actions:
1. Copies the value of the FPSCR to a general-purpose register.
2. Copies the value of the FPSCR flag bits to the APSR N, Z, C, and V flags.
Restrictions
Rt cannot be PC or SP.
Condition flags
These instructions optionally change the flags: N, Z, C, V
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