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Tait TP9100 - RF Hardware and Baseband Processing

Tait TP9100
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TP9100 Service Manual Description 37
© Tait Electronics Limited May 2005
2.5.1 RF Hardware
PIN Switch The RF PIN switch circuitry selects the RF path to and from the antenna
to either the Tx or Rx circuitry of the radio. In addition to the switching
functionality, the PIN switch is used to provide attenuation to the Rx front
end in high signal-strength locations.
Front End and
First IF
The front-end hardware amplifies and filters the received RF spectrum, then
down-converts the desired channel frequency to a first intermediate
frequency IF1 of 45.1MHz (UHF) or 21.4MHz (VHF) where coarse
channel filtering is performed. The first LO signal is obtained from the
frequency synthesizer and is injected through an adjustable gain buffer on
the low side of the desired channel frequency for all bands. In receive mode
the modulation to the frequency synthesizer is muted. See “Frequency
Synthesizer” on page 44 for a description of the frequency synthesizer.
The output of the first IF is then down-converted using an image-reject
mixer to a low IF of 64kHz.
Quadrature
Demodulator
The LO for the image-reject mixer (quadrature demodulator) is synthesized
and uses the TCXO as a reference. This ensures good centring of the IF
filters and more consistent group-delay performance. The quadrature
demodulator device has an internal frequency division of 2 so the second
LO operates at 2 x (IF1+64kHz). The quadrature output from this mixer is
fed to a pair of ADCs with high dynamic range where it is oversampled at
256kHz and fed to the custom logic device.
Automatic Gain
Control
The AGC is used to limit the maximum signal level applied to the image-
reject mixer and ADCs in order to meet the requirements for
intermodulation and selectivity performance. Hardware gain control is
performed by a variable gain amplifier within the quadrature demodulator
device driven by a 10-bit DAC. Information about the signal level is
obtained from the IQ data output stream from the ADCs. The control loop
is completed within the custom logic. The AGC will begin to reduce gain
when the combined signal power of the wanted signal and first adjacent
channels is greater than about -70dBm.

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