Tait TP9100 - Page 70

70 Circuit Descriptions TP9100 Service Manual
© Tait Electronics Limited May 2005
User Interface
The main board includes the circuitry for the following control elements:
■ ON/OFF switch
■ volume potentiometer
■ status LEDs
■ speaker/microphone
■ PTT, function, and emergency keys
ON/OFF Switch The radio is powered up as described in “Power-Up Circuitry” on page 65.
Volume
Potentiometer
The voltage level of the volume potentiometer is converted to a digital
signal by an analog/digital converter (IC204) and processed by the FPGA.
Status LEDs The red and green status LEDs are controlled by an FPGA signal and a
transistor (Q904 dual-device). Amber color is generated by turning on the
red and green LEDs simultaneously.
Speaker/
Microphone
The two speaker/microphone lines (SPKR POS and SPKR NEG) are connected
to the speaker through spring probe connectors. Speaker audio comes from
IC200 and microphone audio is clamped and amplified through D200 and
IC202.
PTT, Function, and
Emergency Keys
The signals from the tact switches are connected directly to the input pins
of the FPGA.
3.3V Accessory A current limited 3.3V Accessory supply is provided on ACC_PWR
output. Current is limited to approx 50mA by IC900. The current limit
setpoint is determined by the value of R954. Above the current setpoint,
the output voltage folds back to protect the radio and accessory from over-
current.
Battery Data A dedicated bidirectional data signal is provided on BATT DATA to allow the
radio to communicate with a smart battery. After ESD and over-voltage
protection though C912, D909, R930, D919 and R943 it connects to a
bidirectional digital line in the digital section. In addition a 4.7kΩ pull up
resistor (R721) can be switched in or out by the digital section to provide
bias to the data line.
Front-Panel Keypad The interface to the front-panel keypad is an array of four column inputs
and four row inputs, giving a maximum of 16 keys. The column and row
signals connect directly to the FPGA. During idle operation the
ROW signals
are driven low by the FPGA and the
COL signals (pulled high by an external
resistor) are monitored for activity by the FPGA. A key-press will generate
a high-to-low transition on the associated
COL signal. This, in turn, will
initiate a sequence of high output levels on the
ROW signals to identify which
key was pressed.