LE910Cx Hardware Design Guide
1VV0301298 Rev.40 Page 38 of 149 2023-03-16
Not Subject to NDA
Logic Level Specifications
Unless otherwise specified, all LE910Cx interface circuits are 1.8V CMOS logic. Only few
specific interfaces (such as MAC, USIM and SD Card) are capable of dual voltage I/O.
The following tables show the specifications of the logic level used in the LE910Cx
interface circuits.
Note: Do not connect LE910Cx digital logic signals directly to OEM
digital logic signals with a level higher than 2.7V for 1.8V CMOS
signals.
4.3.1. 1.8V Pads - Absolute Maximum Ratings
Parameter Min Max
Input level on any digital pin when on -0.3V +2.16V
Input voltage on analog pins when on -0.3V +2.16 V
Table 11: Absolute Maximum Ratings - Not Functional
4.3.2. 1.8V Standard GPIOs
Pad Parameter Min Max Unit Comment
V
IH
Input high level 1.25V -- [V]
V
IL
Input low level -- 0.6V [V]
V
OH
Output high
level
1.4V -- [V]
V
OL
Output low level -- 0.45V [V]
I
IL
Low-level input
leakage current
-1 -- [uA] No pull-up
I
IH
High-level input
leakage current
-- +1 [uA] No pull-down
R
PU
Pull-up
resistance
30 390 [kΩ]
R
PD
Pull-down
resistance
30 390 [kΩ]
C
i
Input
capacitance
-- 5 [pF]
Table 12: Operating Range – Interface Levels (1.8V CMOS)
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