LE910Cx Hardware Design Guide
1VV0301298 Rev.40 Page 61 of 149 2023-03-16
Not Subject to NDA
Considering the very low current during Idle, especially if the Power Saving function is
enabled, it is possible to consider from the thermal point of view that the device absorbs
significant current only during an Active Call or Data session.
For the heat generated by the LE910Cx module, consider it to be 2W max during
transmission at Class10 GPRS upload.
In LTE/WCDMA/HSPA mode, the LE910Cx emits RF signals continuously during
transmission. Therefore, special attention must be paid to how to dissipate the heat
generated.
The LE910Cx is designed to conduct heat flow from the module IC’s towards the bottom
of the PCB across GND metal layers
The generated heat is mainly conducted to the ground plane under the LE910Cx module.
The application board should be properly designed to dissipate this heat.
Application board design must ensure that the area under the LE910Cx module is as large
as possible. Make sure that the LE910Cx is mounted to the large ground area of the
application board and provide plenty of ground vias to dissipate heat.
Although the peak current consumption in GSM mode is higher than in
LTE/WCDMA/HSPA, considerations for the heat sink are more important in the case of
WCDMA due to the continuous transmission conditions.
6.3.3. Power Supply PCB Layout Guidelines
As seen on the guidelines for electrical design, the power supply shall have a low ESR
capacitor on the output to cut the current peaks and a protection diode on the input to
protect the supply from spikes and polarity inversion. The placement of these
components is crucial for the correct operation of the circuitry. A misplaced component
can be useless or can even decrease the power supply performances.
The bypass low ESR capacitor must be placed close to the LE910Cx power input
pads or, if the power supply is of a switching type, it can be placed close to the
inductor to cut the ripple, provided the PCB trace from the capacitor to LE910Cx is
wide enough to ensure a drop-less connection even during the 2A current peaks.
The protection diode must be placed close to the input connector where the power
source is drained.
The PCB traces from the input connector to the power regulator IC must be wide
enough to ensure that ohmic voltage drops doesn’t exceed 20-30mV during the 2A
current peaks.