LE910Cx Hardware Design Guide
1VV0301298 Rev.40 Page 56 of 149 2023-03-16
Not Subject to NDA
* The above currents in idle are measured when Status LED, which is controlled by AT#SLED, is turned
off. See the AT Command User Guide for details about the AT#SLED section.
Note: The current consumption of CFUN=0 mode could be 300uA
higher than CFUN=5 mode to support the wake-up by RTS pin. For
more details, please see the AT Command User Guide of AT+CFUN
section.
Note: Regarding the eDRX mode, please refer to 80502NT11758A,
LE910C1/LE910C4 PSM Application Note.
Note: The electrical design for the power supply must ensure a peak
current output of at least 2.0A.
Note: In GSM/GPRS mode, the RF transmission is not continuous, but
is packed into bursts at a base frequency of approximately 216 Hz
with relative current peaks up to about 2.0A. Therefore, the power
supply must be designed to withstand these current peaks without
large voltage drops. This means that both the electrical design and
the board layout must be designed for this current flow.
If the PCB layout is not well designed, a strong noise floor is
generated on the ground. This will be reflected on all audio paths
producing an annoying audible noise at 216 Hz.
If the voltage drops during the peaks, the current absorption is too
high. The device may even shut down as a consequence of the supply
voltage drop.
General Design Rules
The principal guidelines for the Power Supply Design embrace three different design
steps:
Electrical design
Thermal design
PCB layout
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