AM3359, AM3358, AM3357, AM3356, AM3354, AM3352
SPRS717H –OCTOBER 2011–REVISED MAY 2015
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Table 4-1. Pin Attributes (ZCE and ZCZ Packages) (continued)
BALL RESET BUFFER PULLUP
ZCE BALL ZCZ BALL TYPE BALL RESET RESET REL. ZCE POWER / HYS
PIN NAME [2] SIGNAL NAME [3] MODE [4] REL. STATE STRENGTH /DOWN TYPE I/O CELL [13]
NUMBER [1] NUMBER [1] [5] STATE [6] MODE [8] ZCZ POWER [9] [10]
[7] (mA) [11] [12]
K19 J15 MII1_RX_ER gmii1_rxerr 0 I L L 7 VDDSHV5 / Yes 6 PU/PD LVCMOS
VDDSHV5
rmii1_rxerr 1 I
spi1_d1 2 I/O
I2C1_SCL 3 I/OD
mcasp1_fsx 4 I/O
uart5_rtsn 5 O
uart2_txd 6 O
gpio3_2 7 I/O
M19 L18 MII1_RX_CLK gmii1_rxclk 0 I L L 7 VDDSHV5 / Yes 6 PU/PD LVCMOS
VDDSHV5
uart2_txd 1 O
rgmii1_rclk 2 I
mmc0_dat6 3 I/O
mmc1_dat1 4 I/O
uart1_dsrn 5 I
mcasp0_fsx 6 I/O
gpio3_10 7 I/O
N19 K18 MII1_TX_CLK gmii1_txclk 0 I L L 7 VDDSHV5 / Yes 6 PU/PD LVCMOS
VDDSHV5
uart2_rxd 1 I
rgmii1_tclk 2 O
mmc0_dat7 3 I/O
mmc1_dat0 4 I/O
uart1_dcdn 5 I
mcasp0_aclkx 6 I/O
gpio3_9 7 I/O
J19 H16 MII1_COL gmii1_col 0 I L L 7 VDDSHV5 / Yes 6 PU/PD LVCMOS
VDDSHV5
rmii2_refclk 1 I/O
spi1_sclk 2 I/O
uart5_rxd 3 I
mcasp1_axr2 4 I/O
mmc2_dat3 5 I/O
mcasp0_axr2 6 I/O
gpio3_0 7 I/O
38 Terminal Configuration and Functions Copyright © 2011–2015, Texas Instruments Incorporated
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